On-Site
Full-Time
Bengaluru, Karnataka
India
Skills
Semiconductor Engineering
DFT
Very-Large-Scale Integration (VLSI)
Joint Test Action Group (JTAG)
BIST
About the Role
Hello All,
We, #ACL Digital is hiring for #LeadDFT Engineers.
Exp Level: 7+years
Notice Period: Immediate to 90 days
Job Description:
· Strong background and experience with #Scan design, #Clock architecture, #ATPG methodology and industry standard tools
· Worked on #Test compressions and decompression scan methodology generating test patterns at #block and #SoC level.
· Worked on #ATPG test pattern generation stuck-at and at-speed with depth fault coverage analysis identifying issues to meet the coverage targets.
· Worked on boundary Scan test plan, test coverage with #JTAG
· Understand #MBIST concepts and insertion and test the integration at partition and #SoC level.
· Understand the concept of memory redundancy logic.
· Understand JTAG concepts with all jtag IEEE standards
· Worked on industry standard #DFT tools
· Strong knowledge on scripting in #TCL/ #Perl/ #Python.
· Must possess good communication skills, be a self-driven individual and a good team player
Interested can share/refer cv to [email protected]
We, #ACL Digital is hiring for #LeadDFT Engineers.
Exp Level: 7+years
Notice Period: Immediate to 90 days
Job Description:
· Strong background and experience with #Scan design, #Clock architecture, #ATPG methodology and industry standard tools
· Worked on #Test compressions and decompression scan methodology generating test patterns at #block and #SoC level.
· Worked on #ATPG test pattern generation stuck-at and at-speed with depth fault coverage analysis identifying issues to meet the coverage targets.
· Worked on boundary Scan test plan, test coverage with #JTAG
· Understand #MBIST concepts and insertion and test the integration at partition and #SoC level.
· Understand the concept of memory redundancy logic.
· Understand JTAG concepts with all jtag IEEE standards
· Worked on industry standard #DFT tools
· Strong knowledge on scripting in #TCL/ #Perl/ #Python.
· Must possess good communication skills, be a self-driven individual and a good team player
Interested can share/refer cv to [email protected]
Apply for this position
Application Status
Application Draft
In Progress
Submit Application
Pending
Review Process
Expected within 5-7 days
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